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Electrical Characteristics of LOMOST under Various Overlap Lengths between Gate and Drift Region

게이트와 드리프트 영역 오버랩 길이에 따른 LDMOST 전력 소자의 전기적 특성

  • 하종봉 (충북대학교 반도체공학과) ;
  • 나기열 (충북대학교 반도체공학과) ;
  • 조경록 (충북대학교 반도체공학과) ;
  • 김영석 (충북대학교 반도체공학과)
  • Published : 2005.07.01

Abstract

In this paper the gate overlap length of the LDMOST is optimized for obtaining longer device lifetime. The LDMOSI device with drift region is fabricated using the $0.25\;{\mu}m$ CMOS Process. The gate overlap lengths on drift region are $0.1\;{\mu}m,\;0.4\;{\mu}m\;0.8\;{\mu}m\;and\;1.1\;{\mu}m$, respectively. The breakdown voltages, on-resistances and hot-carrier degradations of the fabricated LDMOST devices are characterized. The LDMOST device with gate overlap length of $0.4\;{\mu}m$ showed the longest on-resistance lifetime, 0.02 years and breakdown voltage of 22 V and on-resistance of $23\;m\Omega{\cdot}mm^2$.

Keywords

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