반도체디스플레이기술학회지 (Journal of the Semiconductor & Display Technology)
- 제3권4호
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- Pages.19-27
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- 2004
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- 1738-2270(pISSN)
하우스킵핑 A/D 변환기의 테스트 알고리즘과 측정
Test Algorithm and Measurement of Housekeeping A/D Converter
초록
The characteristic evaluation of A/D converter is to measure the linearity of the converter. The evaluation of the linearity is to measure the DNL, INL, gain error and offset error in the various test parameters of A/D converter. Generally, DNL and INL are to be measured by the Histogram Test Algorithm in the DSP-based ATE environment. And gain error and offset error are to be measured by the calculation equation of the measuring algorithm. It is to propose the new Concurrent Histogram Test Algorithm for the test of the housekeeping A/D converter used in the CDMA cellular phone. Using the proposed method, it is to measure the DNL, INL, gain error and offset error concurrently and to show the measured results.
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