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Wafer Burn-in Method of SRAM for Multi Chip Package

  • Kim, Hoo-Sung (Memory Division, Samsung Electronics Co., Ltd.) ;
  • Kim, Je-Yoon (Department of Electrical Engineering, Korea University) ;
  • Sung, Man-Young (Department of Electrical Engineering, Korea University)
  • 발행 : 2004.08.01

초록

This paper presents the improved bum-in method for the reliability of SRAM in Multi Chip Package (MCP). Semiconductor reliability is commonly improved through the bum-in process. Reliability problem is more significant in MCP that includes over two chips in a package, because the failure of one chip (SRAM) has a large influence on the yield and quality of the other chips - Flash Memory, DRAM, etc. Therefore, the quality of SRAM must be guaranteed. To improve the quality of SRAM, we applied the improved wafer level bum-in process using multi cells selection method in addition to the previously used methods. That method is effective in detecting special failure. Finally, with the composition of some kind of methods, we could achieve the high quality of SRAM in Multi Chip Package.

키워드

참고문헌

  1. Dong Hee Rhie, Bok Gil Choi, Man Young Sung, Byung Moo Moon, and Yung Kwon Sung, 'A Study on the Life Time Prediction for the Oxide of MOS Capacitor', J. of KIEEME(in Korean), Vol. 12, No.7, p. 271, 1991
  2. H. H. Huston, M. H. Wood, and V. M. De Palma, 'Bum-in Effectiveness - Theory and Measurement,' International Reliabiliy Physics Symposium, p. 271, 1991
  3. Joo-Hyoung Lee, Myoung-Jun Jang, Ki-Seok Youn, Young-Jin Park, Hee-Goo Youn, and Hi-Deok Lee, 'Characterization of Stress-Induced p+/n Junction Leakage Failure for sub-0.15 um CMOS Technology', J. Korean Physic Soc. Vol. 40, p. 610, 2002 https://doi.org/10.3938/jkps.40.610
  4. Hodges. D. 'Flip chip MCM-L using known good die', International Module and High density packaging, p. 358, 1998
  5. Nierle. K., 'Method for increasing bum in efficiency for DRAMs", International Reliability Workshop Final Report, p. 183,2000
  6. Adit. D. Singh, 'On Wafer Bum-In Strategies for MCM Die", International Conference and Exhibition Multichip Modules, p. 255, 1994
  7. Ji Cheol Bae, Yong Jae Lee, 'Degradation of Gate Induced Drain Current of p- MOSFET along to Analysis Condition', J. of KIEEME(in Korean), Vol.10, No. 1,p.26, 1997
  8. Chandramouli, R, 'Sequential tests for integrated-circuit failures', Reliability, IEEE Transactions on, Vol. 47, Issue 4, p. 463, 1998 https://doi.org/10.1109/24.756091