References
- IEEE J. Solid-State Circuits v.32 A 250-mW,8-b,52-M sample/s Parallel-Pipelined A/D Converter with Reduced Number of Amplifiers K.Nagaraj;H.S.Fetterman;J.Anidjar;S.H.Lewis;R.G.Renninger https://doi.org/10.1109/4.557628
- IEEE J. Solid-State Circuits v.31 A 175M s/s,6b,160mW,3.3V CMOS A/D Converter R.Roovers;M.S.J.Steyaert https://doi.org/10.1109/4.508206
- IEEE J. Solid-State Circuits v.31 CMOS Folding Converters with Current-mode Interpolation M.P.Flynn;D.J.Allstor https://doi.org/10.1109/4.535408
- IEEE J. Solid-State Circuits v.31 A CMOS 6-b,200M Sample/s,3V-Supply A/D Converter for a PRML Read Channel LSI S.Tsukamoto(et al.) https://doi.org/10.1109/JSSC.1996.542408
- IEEE J. Solid-State Circuits v.22 An 8-b video ADC Incorporationg Folding and Interpolation Techniques R.E.J.van de Grift;I.W.J.Rutten;M.van de Veen https://doi.org/10.1109/JSSC.1987.1052842
- IEEE J. Solid-State Circuits v.30 A 70-MS/s 110mW 8-b CMOS Folding and Interpolation A/D Converter B.Nauta;A.;G.W.Venes https://doi.org/10.1109/4.482155
- IEEE Custom Integrated Circuits Conference A 100 MHz 8-bit CMOS Interpolating A/D Converter M.Steyaert;R.Roovers;J.Craninckx
- IEEE J. Solid-State Circuits v.37 An Embedded 0.8V/480uW 6B/22 MHz Flash ADC in 0.13-um Digital CMOS Process Using a Nonlinear Double Interpolation Technique J.Lin;B.Haroun https://doi.org/10.1109/JSSC.2002.804333
- IEEE Transactions on Circuits and System-II:Analog and Digital Signal Processing v.49 no.3 Analysis and Simulation of Distortion in Folding and Interpolating A/D Converters S.Limotyrakis;K.Y.Nam;B.A.Wooley https://doi.org/10.1109/TCSII.2002.1013862
- IEEE International Symposium on Circuits and Systems v.1 Wallace Tree Encoding in Folding and Interpolation ADCs P.Pereira;J.R.Fernandes;M.M.Silva