TFT-LCD 공장의 라인 밸런싱을 고려한 MPS 수립에 관한 연구

A Study of Master Production Scheduling Scheme in TFT-LCD Factory considering Line Balancing

  • 원대일 (고려대학교 산업시스템정보공학과) ;
  • 백종관 (고려대학교 정보통신기술공동연구소) ;
  • 김성식 (고려대학교 산업시스템정보공학과)
  • Won, Dae-Il (Department of Industrial Systems and Information Engineering, Korea University) ;
  • Baek, Jong-Kwan (Research Institute for Information and Communication Technology, Korea University) ;
  • Kim, Sung-Shick (Department of Industrial Systems and Information Engineering, Korea University)
  • 투고 : 20030500
  • 심사 : 20031000
  • 발행 : 2003.12.31

초록

In this study we consider the problem of MPS(master production planning) of TFT-LCD(Thin Film Transistor - Liquid Crystal Display) production factory. Due to the complexities of the TFT-LCD production processes, it is difficult to build effective MPS. This study presents an algorithm having a concept of IDPQ(Ideal Daily Production Quantity) that considers line balancing of TFT-LCD production process. In general, the MPS building procedure does not consider line balancing in non-bottleneck processes. MPS without considering line balancing may make ineffective schedule. We present algorithms for building MPS considering factory capacity and line balancing according to the sales order.

키워드

참고문헌

  1. Aghezzaf, E.H, Artiba, A., and Elmaghraby, S.E. (1995), Hybrid Flowshop: an LP Based Heuristic for the Production Planning, Emerging Technologies and Factory Automation, INRIA/IEEE Symposiem, 1, 5551-559
  2. Chen, J.C, Yang-Chih Fan, Wang, J.Y., Lin, T.K., Leea, S.H., Wu, S.C, and Lan, Y.J. (1999), Capacity Planning for a Twin Fab, Semiconductor Manufacturing Conference, IEEE, 317-320
  3. Gianesi, I.G.N. (1998), Implementing Manufacturing Strategy through Strategic Production Planning, lnternational Journal of Operations & Production Management, 18(3), 286-299
  4. Glassey, C.R. and Resende, M.G.C. (1988), A Scheduling Rule for Job Release in Semiconductor Fabrication, Operation Research Letters, 7, 213-217
  5. Jeong, B., Kim, S., and Lee, Y. (2001), An assemblty Scheduler for TFT-LCD Manufacturing, Computer & Industrial Engineering, 41, 37-58
  6. Jeong, B., and Sohn, S.(1997), Determination of an Economic Lot Size of Color Filters TFT-LCD Manufacturing, IE Interfaces, 10(1), 47-56
  7. Johri, P.K. (1993), Practical Issues in Scheduling and Dispatching in Semiconductor Wafer Fabrication, Journal of Manufacturing Systems, 12(6), 474-485
  8. Leachman, R.C. Kang,J.Y., and Lin, V. (2002), SUM:Short Cycle Time and Low Inventory in Manufacturing at Samsung Electronics, Interfaces, 32(1), 61-77
  9. Leachman, R.C. (1994), Production Planning and Scheduling Practices Across the Semiconductor Industry, ESRC Report 94-29, Engineering Systems Research Center, University of California, Berkeley
  10. Leachman, R.C. (1994), The Competitive Semiconductor Manufacturing Survey: Second Report on Result of the Main Phase, CSM-OS Report
  11. Lee, Y.H., Kim, H/Y., Lee, G.W., and Lee, S.W. (1995), Production Planning and Control in Semiconductor Inderstry: Theory and Practice, IE Interfaces, 8(4), 73-88
  12. Maes, J., McClain, J.O., and Van Wassenhove. L.N. (1991), Multilevel Capacitated Lotsizing Complexity and LP-Based Heuristics, European Journal of Operation Research, 53,131-141
  13. Mason, S.J., Fowler, J.F., and Caryle, W.M. (2002), A Modified Shifting Bottleneck Heuristic for Minimizing Total Weighted Tardiness in Complex Job Shops, Journal of Scheduling, 5(3), 247-262
  14. Milar, H.H, and Yang, M. (1993), An Application of Lagrangean Decomposition co the Capacitated Multi-item Lot sizing Problem, Computer Ops Res., 20(4), 409-420
  15. Na, H.Y., Baek, J.K., and Kim, S.S. (2002), A Study of production Scheduling Scheme in TFT-LCD Factory, IE Interfaces, 15(4), 325-337
  16. Porter, K., Little, D., Peck, and Rollins, R (1999), Manufacturing Classifications: Relationships with Production Control Systems, Integrated Manufacturing Systems, 10(4), 189-199
  17. Song, W. (2000), A Study on Master Production Scheduling for TFT-LCD factory, a thesis for a master degree, Department of Industrial Systems and Information Engineering, Korea University
  18. Uzsoy, R., Lee,C.Y., and Martin-vega, L.A.(1992), A Review of Production Planning and Scheduling Models in the Semiconductor Industry, Part 1: System Characteristics, Performance Evaluation, and Production Planning, lIE Transactions on Scheduling and Logistics, 24(4),47-61
  19. Uzsoy, R, Lee, C.Y., and Martin-vega, L.A.(1994), A Review of Production Planning and Scheduling Models in the Semiconductor Industry, Part 2: Shop-Floor Control, IIE Transactions on Scheduling and Logistica, 26(5), 44-55
  20. Wein, L.M. (1988), Scheduling Semiconductor Wafer Fabrication, IEEE Transactions on Semiconductor Manufacturing, 1(3),115-129