참고문헌
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IEEE Tran on Electron Devices
v.46
no.5
Bias temperature instability in scaled
$P^+$ polysilicon gate pMOSFET's T. Yamamoto;K. Uwasawa;T. Mogami https://doi.org/10.1109/16.760398 - IRPS 2002 Impact of negative bias temperature instability on digital circuit reliability V. Reddy;A. Krishnan;A. Marchall;J. Rodriguez
- Symp. on VLSI Technology A strategy using a copper/low k BEOL process to prevent negative bias temperature instability (NBTI) in PMOSFET A. Suzuki;K. Tabuchi;H. Kimura
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전기전자재료학회 논문지
v.7
no.1
$N_2O$ 가스로 재산화시킨 oxynitride막의 특성 김태형;김창일;최동진;장의구 -
전기전자재료학회 논문지
v.6
no.3
$N_2O$ 가스로 열산화된 게이트 산화막의 특성 이철인;최현식;서용진;김창일;김태형;장의구 - J. Electrochem. Soc. v.137 no.11 Annealing characteristics of ultrathin silicon oxides grown at low temperatures S. Tay;A. Kalnitsky;G. Kelly https://doi.org/10.1149/1.2086271
- IEEE Electron Device Lett v.9 no.11 Leakage current degradation in nMOSFET's due to hot electron stress C. Duvvury;D. Redwine;H. Stiegler https://doi.org/10.1109/55.9282
- IEEE Trans. Electron Devices v.40 The effect of oxide charges at LOCOS isolation edges on oxide breakdown H. Uchida;N. Hirashita;T. Ajioka https://doi.org/10.1109/16.277339
- J. Electrochem. Soc v.129 no.11 A viscous flow model to explain the appearance of high density thermal SiO2 at low oxidation temperatures E. Irene;E. Tierney;J. Angillelo https://doi.org/10.1149/1.2123617