Trenched-Sinker LDMOSFET (TS-LDMOS) Structure for 2 GHz Power Amplifiers

  • 투고 : 2002.10.15
  • 발행 : 2003.06.30

초록

This paper proposes a new LDMOSFET structure with a trenched sinker for high-power RF amplifiers. Using a low-temperature, deep-trench technology, we succeeded in drastically shrinking the sinker area to one-third the size of the conventional diffusion-type structure. The RF performance of the proposed device with a channel width of 5 mm showed a small signal gain of 16.5 dB and a maximum peak power of 32 dBm with a power-added efficiency of 25% at 2 GHz. Furthermore, the trench sinker, which was applied to the guard ring to suppress coupling between inductors, showed an excellent blocking performance below -40 dB at a frequency of up to 20 GHz. These results confirm that the proposed trenched sinker should be an effective technology both as a compact sinker for RF power devices and as a guard ring against coupling.

키워드

참고문헌

  1. IEEE Trans. on Electron Devices v.ED-21 Si UHF MOS High power FET Morita, Y.;Takahashi, H.;Matayoshi, H.;Fukuta, M.
  2. IEDM Tech. Digest High Performance Silicon LDMOS Technology for 2GHz RF Power Amplifier Applications Wood, A.;Dragon, C.;Burger, W.
  3. RAWCON Proc. Application of RF LDMOS Power Transistor for 2.2 GHz Wideband-CDMA Wood, A.;Brakensiek, W.
  4. IEDM Tech. Digest RF LDMOS with Extreme Low Parasitic Feedback Capacitance and High Hot-Carrier Immunity Xu, S.;Foo, P.;Wen, J.;Liu, Y.;Lin, F.;Ren, C.
  5. Proc. of ESSDERC 1996 A Highly Efficient 1.9GHz Si Power MOSFET Yoshida, I.;Katsueda, M.;Maruyama, Y.;Kohjiro, I.
  6. IEDM Tech. Digest High Efficiency LDMOS Power FET for Low Voltage Wireless Communication Ma, G.;Burger, W.;Dragon, C.;Gillenwater, T.
  7. ETRI J. v.24 no.5 A Novel Process for Fabricating a High Density Trench MOSFETs for DC-DC Converters Kim, Jong-Dae(et al.)
  8. IEDM Tech. Digest 2001 Trenched Sinker LDMOSFET (TS-LDMOS) Structure for High Power Amplifier Application above 2 GHz Kim, Cheon-Soo;Park, Joung-Woo;Yu, Hyun-Kyu
  9. IEEE IMS Digest 2001 $A 0.18{\mu}m$ Foundry RF CMOS Technology with 79 GHzfT for Single Chip Solution Hsu, H.M.(et al.)
  10. Proc. of ISPSD 1992 Highly Efficient 1.5 GHz Si Power MOSFET for Digital Cellular Front End Yoshida, I.;Katsueda, M.;Ohtaka, S.;Maruyama, Y.;Okabe, T.
  11. ETRI J. v.21 no.4 Thick Metal CMOS Technology on High Resistivity SubstrateAnd Its Application to Monolithic L-band CMOS LNAs Kim, Cheon-Soo;Park, Min;Kim, Chung-Hwan;Yu, Hyun-Kyu;Lee, Ky-Ro;Cho, Han-Jin
  12. IEEE Journal of Solid State Circuits v.33 no.6 Substrate Noise Coupling Through Planar Spiral Inductor Pun, A.L.L.;Yeung, T.;Lau, J.;Clement, F.J.R.;Su, D.K.
  13. IEEE Journal of Solid State Circuits v.33 no.12 RF Circuit Design Aspects of Spiral Inductors on Silicon Burghartz, J.N.;Edelstein, D.C.;Soyuer, M.;Ainspan, H.A.;Jenkins, K.A.
  14. IEEE Journal of Solid State Circuits v.28 no.4 Experimental Results and Modeling Techniques for Substrate Noise in Mixedsignal Integrated Circuits Su, D.K.;Loinaz, M.J.;Masui, S.;Wooley, B.A.
  15. IEEE MTT-s Digest 2001 Deep Trench Guard Technology to Suppress Coupling between Inductors in Silicon RF ICs Kim, C.S.;Park, M.;Park, J.W.;Yu, H.K.
  16. IEDM Tech. Digest 2000 A High Aspect-Ratio Silicon Substrate-Via Technology and Applications: Through-Wafer Interconnects for Power and Ground and Faraday Cages for SOC Isolation Wu, Joyce H.;del Alamo, Jesus A.;Jenkins, Keith A.