A Fault-Tolerant Duplex Microcontroller Architecture

결함내성형 이중 마이크로콘트롤러 구조

  • 김병진 (삼성전자 DS총괄 SystemLSI) ;
  • 백승수 (삼성전자 DS총괄 AMLCD) ;
  • 이인환 (한양대학 전자전기컴퓨터공학부) ;
  • 임동진 (한양대학 전자컴퓨터공학부)
  • Published : 2002.04.01

Abstract

This paper presents a fault-tolerant duplex architecture to build a high-reliability microcontroller using commercial VLSI processors. The architecture supports fail-silence under all single-failure situations and facilitates recovery from transient failures. The paper implements the duplex architecture using two Motorola MC68360 processors and evaluates its fault tolerance in a real application environment.

Keywords

References

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