Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Depletion region analysis of silicon substrate using finite element methods

유한요소법을 이용한 실리콘 기판에서의 공핍 영역 해석

  • 변기량 (중앙대학교 전자전기학부) ;
  • 황호정 (중앙대학교 전자전기학부)
  • Published : 2002.01.01
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Abstract

In this paper, new simple method for the calculation of depletion region under complex geometry and general purpose numerical simulator that could handle this were developed and applied in the analysis of SCM with nanoscale tip, which is a promising tool for high resolution dopant profiling. Our simple depletion region seeking algorithm alternatively switches material of elements to align ionized element boundary with contour of zero potential. To prove the validity of our method we examined whether our results satisfy the definition of depletion region and compared those with known values of un junction and MOS structure. By modeling of capacitance based on the shape of depletion region and potential distribution, we could calculate the CV curve and dC/dV curve between silicon substrate and nanoscale SCM tip.

본 논문에서는 나노영역의 고해상도 도핑 농도 측정 장비 개발을 위해 공핍 근사 조건하 복잡한 계산 영역에서 공핍 영역을 간단히 계산할 수 있는 방법을 개발하였다. 개발된 공핍영역 계산 방법은 유한요소법을 이용한 적응분할 포아송 방정식 해석기를 사용하여 대전된 영역의 경계에서 전위가 0인 등고선과 일치하도록 하여 계산하는 방법이다. 이 방법의 타당성을 검증하기 위해 계산된 대전영역 및 전위분포가 공핍영역의 정의에 맞는지 확인하였으며, pn 접합에서의 공핍영역 깊이 및 MOS 구조에서 정전용량을 계산하여 비교해 본 결과 이론치와 정확히 일치함을 알 수 있었다. 이러한 Pn 접합 및 MOS 에서 공핍영역 계산 검증을 바탕으로 나노영역의 탐침을 장착한 SCM에서 전압에 따른 실리콘 내의 공핍영역 모양과 전위를 분석하여, 정전용랑 모델링을 하였으며, 이로부터 CV 곡선과 SCM의 출력인 dC/dV곡선을 계산하였다.

Keywords

References

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