ETRI Journal

  • 제24권5호
  • /
  • Pages.333-340
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  • 2002
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  • 1225-6463(pISSN)
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  • 2233-7326(eISSN)
한국전자통신연구원 (Electronics and Telecommunications Research Institute)
권호 표지

A Novel Process for Fabricating High Density Trench MOSFETs for DC-DC Converters

  • 투고 : 2002.01.11
  • 발행 : 2002.10.31
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초록

We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3-2.4 ${\mu}m$ was 100 Mcell/$in^2$ and a specific on-resistance of 0.41 $m{\Omega}{\cdot}cm^2$ was obtained under a blocking voltage of 43 V.

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참고문헌

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