Journal of the Institute of Electronics Engineers of Korea CI (전자공학회논문지CI)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design for PN code Synchronous Acquisition System of DS-SS/CDMA Receiver Using New SW-DMF

새로운 SW-DMF를 이용한 DS-SS/CDMA 시스템 수신기의 PN 코드동기 포착 시스템의 설계

  • Cho, Byung-Lok (School of Info. & Comm. Engineering College, Sunchon National Uuiversity) ;
  • Rhee, Kang-Hyeon (School of Elec. & Info.-Comm. Eng., Elec. Info. College, Chosun University) ;
  • Ha, Suk-Ki (DV Technology Inc.)
  • 조병록 (순천대학교 정보통신공학부) ;
  • 이강현 (조선대학교 전자정보공과대학 전자정보통신공학부) ;
  • 하석기 ((주)디브이테크놀러지)
  • Published : 2001.07.25
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Abstract

In this paper, we propose an average acquisition time and hardware design of high speed PN code synchronous acquisition system using DMF(Digital Matched Filter) with new switching method in DS-SS/CDMA(Direct Sequence Spread Spectrum Code Division Multiple Access). In reality, the PN code synchronous acquisition system using DMF has very complicated hardware, high cost and high power consumption. The PN code synchronous acquisition system using proposed switching method DMF can overcome those disadvantages. Therefore, we can make hardware simple and obtain low power and high density by reducing the area by 1/5 against the conventional approaches of using either the matched filters or the serial correlators. The proposed system architecture is also simple and easily controllable since there is no square-term circuit after execution of digital filtering.

본 논문에서는 주기가 긴 PN(Pseudo Noise) 확산부호의 DS-SS/CDMA(Direct Sequence Spread Spectrum Code Division Multiple Access) 시스템에서， 새로운 구조인 스위칭 방법 DMF(Digital Matched Filter)를 이용한 고속 PN 코드 동기포착시스템의 평균 포착시간과 하드웨어 설계를 제안한다. 실제로 DMF를 이용하는 PN 코드 동기포착시스템은 매우 복잡하고 비용이 높으며 많은 전력이 소모된다. 제안한 스위칭 방법을 이용한 PN 코드 동기포착시스템은 이러한 단점블을 극복할 수 있다. 띠라서， 하드웨어의 구조를 단순화시키고, 정합필터나 직렬 상관기를 사용하는 기존의 접근방식에 비하여 면적을 약 1/5로 적게 하면서 저전력을 얻을 수 있었다. 또한, 제안한 시스템 구조는 필터링 이후에 오는 제곱화로 생략될 수 있어 단순화되고 제어가 용이하다.

Keywords

References

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