Electrical properties of metal-oxide-semiconductor structures containing Si nanocrystals fabricated by rapid thermal oxidation process

급속열처리산화법으로 형성시킨 $SiO_2$/나노결정 Si의 전기적 특성 연구

  • Kim, Yong (Department of Physcis, Dong-A University) ;
  • Park, Kyung-Hwa (Semiconductor Materials Research Laboratory, Korea Institute of Science and Technology) ;
  • Jung, Tae-Hoon (Semiconductor Materials Research Laboratory, Korea Institute of Science and Technology) ;
  • Park, Hong-Jun (Semiconductor Materials Research Laboratory, Korea Institute of Science and Technology) ;
  • Lee, Jae-Yeol (Semiconductor Materials Research Laboratory, Korea Institute of Science and Technology) ;
  • Choi, Won-Chul (Semiconductor Materials Research Laboratory, Korea Institute of Science and Technology) ;
  • Kim, Eun-Kyu (Semiconductor Materials Research Laboratory, Korea Institute of Science and Technology)
  • 김용 (동아대학교 신소재 물리학과) ;
  • 박경화 (한국과학기술연구원 반도체재료연구실) ;
  • 정태훈 (한국과학기술연구원 반도체재료연구실) ;
  • 박홍준 (한국과학기술연구원 반도체재료연구실) ;
  • 이재열 (한국과학기술연구원 반도체재료연구실) ;
  • 최원철 (한국과학기술연구원 반도체재료연구실) ;
  • 김은규 (한국과학기술연구원 반도체재료연구실)
  • Published : 2001.04.01

Abstract

Metal oxide semiconductor (MOS) structures containing nanocrystals are fabricated by using rapid thermal oxidations of amorphous silicon films. The amorphous films are deposited either by electron beam deposition method or by electron beam deposition assisted by Ar ion beam during deposition. Post oxidation of e-beam deposited film results in relatively small hysteresis of capacitance-voltage (C-V) and the flat band voltage shift, $\DeltaV_{FB}$ is less than 1V indicative of the formation of low density nanocrystals in $SiO_2$ near $SiO_2$/Si interface. By contrast, we observe very large hysteresis in C-V characteristics for oxidized ion-beam assisted e-beam deposited sample. The flat band voltage shift is larger than 22V and the hysteresis becomes even broader as increasing injection times of holes at accumulation condition and electrons at inversion condition. The result indicates the formation of slow traps in $SiO_2$ near $SiO_2$/Si interface which might be related to large density nanocrystals. Roughly estimated trap density is $1{\times}10^{13}cm^{-2}$. Such a large hysteresis may be explained in terms of the activation of adatom migration by Ar ion during deposition. The activated migration may increase nucleation rate of Si nuclei in amorphous Si matrix. During post oxidation process, nuclei grow into nanocrystals. Therefore, ion beam assistance during deposition may be very feasible for MOS structure containing nanocrystals with large density which is a basic building block for single electron memory device.

전자빔증착법과 이온빔의 도움을 받는 전자빔 증착법(ion beam assisted electron beam deposition; IBAED)법으로 비정질 Si(-200nm) 박막을 p-Si 기판위에 성장하고 이 두 구조를 급속열처리산화(Rapid Thermal Oxidation; RTO)를 시킴으로서 $SiO_2$/나노결정 Si(nanocrystal Si)/p-Si구조를 형성하였다. 그 후 시료 위에 Au 막을 증착함으로서 최종적으로 나노결정이 함유된 MOS(metal-oxide-semiconductor)구조를 완성하였다. 이 MOS구조내의 나노결정 Si의 전하충전 특성을 바이어스 sweep 비율을 변화시키면서 Capacitance-Voltage(C-V) 특성을 측정하여 조사하였다. 전자빔증착시료의 경우에는 $\DeltaV_{FB}$(flatband voltage shift)가 1V 미만의 작은 C-V 이력곡선이 관측된 반면 IBAED 시료의 경우는 $\DeltaV_{FB}$가 22V(2V/s Voltage Sweep비율) 이상인 대단히 큰 C-V 이력곡선이 관측되었다. 전자빔증착중 Ar ion beam을 조사하면 표면 흡착원자이동이 활성화되고 따라서 비정질 Si내에 Si의 핵 생성율이 증가하여 후속 급속열처리산화공정중 이 높은 농도의 핵들이 나노결정 Si으로 자라나게 되고 이렇게 형성된 높은 농도의 나노결정의 전하 충전 및 방전현상이 큰 이력곡선을 나타내는 원인이라고 생각된다. 따라서 IBAED 방법이 고농도의 나노결정 Si을 형성시키는데 유용한 방법이라고 판단된다.

Keywords

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