Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

Characteristics of Metal-Oxide- Semiconductor (MOS) Devices with Tungsten Silicide for Alternate Gate Metal

텅스텐 실리사이드를 차세대 게이트 전극으로 이용한 MOS 소자의 특성 분석

  • No, Gwan-Jong (Dept.of Electric Electronics Computer Engineering, Sungkyunkwan University) ;
  • Yun, Seon-Pil (Dept.of Electric Electronics Computer Engineering, Sungkyunkwan University) ;
  • Yang, Seong-U (Dept.of Electric Electronics Computer Engineering, Sungkyunkwan University) ;
  • No, Yong-Han (Dept.of Electric Electronics Computer Engineering, Sungkyunkwan University)
  • 노관종 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 윤선필 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 양성우 (성균관대학교 전기전자 및 컴퓨터공학부) ;
  • 노용한 (성균관대학교 전기전자 및 컴퓨터공학부)
  • Published : 2001.07.01
Download PDF
⟨ Previous Next ⟩

Abstract

We proposed Si-rich tungsten silicide (WSix) films for alternate gate electrode of deep-submicron MOSFETs. The investigation of WSix films deposited directly on SiO$_2$ indicated that the annealing of as-deposited films using a rapid thermal processor (RTP) results in low resitivity, as well as negligible fluorine (F) diffusion. Specifically, the resitivity of RTP-annealed samples at 800 $^{\circ}C$ for 3 minutes in vacuum was ~160 $\mu$$\Omega$ . cm, and the irregular growth of an extra SiO$_2$ layer due to F diffusion during annealing has not been observed. In addition, the analysis of the WSix-SiO$_2$-Si (MOS) capacitors exhibits excellent electrical characteristics.

Si 과다 텅스텐 실리사이드를 초미세 MOS 소자의 대체 게이트 전극으로 제안하였다. SiO₂위에 텅스텐 실리사이드를 직접 증착하고 급속 열처리를 수행한 결과 낮은 저항을 얻고 불소(F) 확산 또한 무시할 수 있음을 확인하였다. 특히, 800 ℃, 진공 분위기에서 3분간 급속 열처리한 텅스텐 실리사이드의 경우 비저항이 ∼160 μΩ·cm이었고, 불소확산에 의한 산화막의 불균일한 성장도 발견할 수 없었다. 또한, WSix-SiO₂-Si (MOS) 캐패시터의 전기적 특성 분석 결과도 우수하였다.

Keywords

References

  1. B. Yu, D. Ju, W. Lee, N. Kepler, T. King and C. Hu, 'Gate engineering for deep-submicron CMOS transistors,' IEEE Trans. Electron Devices, vol. ED-45, no. 6, pp. 1253-1262, 1998 https://doi.org/10.1109/16.678529
  2. W. Lee, T. King and C. Hu, 'Observation of reduced boron penetration and gate depletion for poly-$Si_{0.8}Ge_{0.2}$ gated PMOS Devices,' IEEE Electron Device Lett., vol. 20, no. 1, pp. 9-11, 1999 https://doi.org/10.1109/55.737557
  3. W. Yeh, Y. Shiau and M. Chen, 'A new tungsten gate metal oxide semiconductor capacitor using a chemical vapor deposition process,' J. Electrochem. Soc., vol. 144, no. 1, pp. 214-217, 1997 https://doi.org/10.1149/1.1837387
  4. T. Yamada, M. Moriwaki, Y. Harada, S. Fujii and K. Eriguchi, 'The metal gate MOS reliability with the improved sputtering process for gate electrode,' IEDM, pp. 319-322, 1999 https://doi.org/10.1109/IEDM.1999.824160
  5. Y. Shioya, S. Kawamura, I. Kobayashi, M. Maeda and K. Yanagida, 'Effect of fluorine in chemical-vapor-deposited tungsten silicide film on electrical breakdown of $SiO_2$ film,' J. Appl. Phys., vol. 61, no. 11, pp. 5102-5109, 1987 https://doi.org/10.1063/1.338336
  6. P. J. Wright and K. C. Saraswat, 'The effect of fluorine in silicon dioxide gate dielectrics,' IEEE Trans. Electron Devices, vol. ED-36, no. 5, pp. 879-889, 1989 https://doi.org/10.1109/16.299669
  7. S. L. Hsu, L. M. Liu, M. S. Lin and C. Y. Chang, 'Direct evidence of gate oxide thickness increase in tungsten polycide processes,' IEEE Electron Device Lett., vol. 12, no. 11, pp. 623-625, 1991 https://doi.org/10.1109/55.119218
  8. Y. Shioya and M. Maeda, 'Analysis of the effects of annealing on resistivity of chemical vapor deposition tungsten-silicide films,' J. Appl. Phys., vol. 60, no. 1, pp. 327-332, 1986 https://doi.org/10.1063/1.337647
  9. Y. Shioya, T. Itoh, I. Kobayashi and M. Maeda, 'Change in resistivity and composition of chemical vapor deposited tungsten silicide films by annealing,' J. Electrochem. Soc., vol. 133, no. 7, pp. 1475-1479, 1986 https://doi.org/10.1149/1.2108938
  10. K. Shenai, 'Structural and electrical properties of furnace and rapid thermally annealed LPCVD $WSi_2$ films on single-crystal, polycrystalline, and amorphous silicon substrates,' IEEE Trans. Electron Devices, vol. ED-39, no. 1, pp. 193-199, 1992 https://doi.org/10.1109/16.108229
  11. T. Hara, H. Takahashi and Y. Ishizawa, 'Composition of CVD tungsten silicides,' J. Electrochem. Soc., vol. 134, no. 5, pp. 1302-1306, 1987 https://doi.org/10.1149/1.2100662
  12. K. C. Saraswat, D. L. Brors, J. A. Fair, K. A. Monnig and R. Beyers, 'Properties of low-pressure CVD tungsten silicide for MOS VLSI interconnections,' IEEE Trans. Electron Devices, vol. ED-30, no. 11, pp. 1497-1505, 1983
  13. J. H. Sone, S. -O. Kim, K. -J. Kim, H. S. Kim and H. J. Kim, 'Formation of low pressure chemically vapor deposited W thin film on silicon dioxide for gate electrode application,' Thin Solid Films, 253, pp. 377-381, 1994 https://doi.org/10.1016/0040-6090(94)90351-4
  14. K. Roh, S. Youn. S. Yang and Y. Roh, 'Tungsten silicide($WSi_2$) for the alternate gate metal in metal-oxide-semiconductor (MOS) devices,' AVS 47th International Symposium, Boston, 2000
  15. Y. Roh, L. Trombetta and J. Han, 'Analysis of charge components induced by Fowler-Nordheim tunnel injection in silicon oxides prepared by rapid thermal oxidation,' J. Electrochem. Soc., vol. 142, no. 3, pp. 1015-1020, 1995 https://doi.org/10.1149/1.2048514