Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

Embedded Software Minimization Using Don′t Cares

Don′t Care 정보를 이용한 임베디드 소프트웨어의 최적화

  • Hong, Yu-Pyo (Dept.of Electronic Engineering Dongguk University)
  • Published : 2000.03.01
Download PDF
⟨ Previous Next ⟩

Abstract

This paper exploits the use of don't cares on software synthesis for embedded systems. Embedded systems have extremely tight real-time and code size constraints. We propose applying BDD minimization techniques in the presence of a don't care set to synthesize code for extended Finite State Machines from a BDD-based representation of the FSM transition function. The don't care set can be derived from local analysis as well as from external information. We show experimental results, discuss their implications, the interactions between BDD-based minimization and dynamic variable reordering, and propose directions for future research.

이 논문은 임베디드 소프트웨어를 위한 소프트웨어 합성시 don't care 정보를 이용하여 합성된 소프트웨어의 성능을 향상시키기 위한 방법을 제시한다. 임베디드 시스템은 주로 실시간 처리가 요구되는 분야에 사용되기 때문에 매우 까다로운 실시간 및 코드 크기의 제한이 있기 때문에 그에 관한 최적화는 매우 중요하다. 우리는 BDD 기반의 유한상태기계 전달 함수의 표현으로부터 확장된 유한상태기계를 유도하는 소프트웨어 합성의 경우에 돈 케어정보를 추출하고, 그를 이용한 BBD를 최소화하여, 일차적으로는 코드크기를 줄이고 결과적으로는 코드가 실행되는 임베디드 시스템의 성능을 향상시키는 방법을 제안한다. 그러한 방법이 적용된 실험적 결과를 제시하고, don't care 기반의 BDD 최소화와 BDD 변수의 동적 재배열의 결합 등 관련 연구 방향을 제안한다.

Keywords

References

  1. A. V. Aho and R. Sethi and J. D. Ullmann, Compilers: Principles, Techniques and Tolls. Addition -Wesley, 1988
  2. F. Balarin et al. Hardware-Software Co-design of Embedded Systems - The POLIS approach. Kluwer Academic Publisher, 1977
  3. G. Berry. The Construtive Semantics of Pure Esterel. To Appear, available now at ftp://www.inria.fr/meije/esterel/papers/constructiveness.ps.gz, 1996
  4. G. Berry and P. Couronn and G. Gonthier. The Synchronous Approach to Reactive and Real-time Systems. IEEE Proceedings, 79, September, 1991 https://doi.org/10.1109/5.97297
  5. R.Bryant. Graph-Based Algorithms for Boolean Function Manipulation. IEEE Transactions on Computers, C-35(8), pp. 677-691, August, 1986
  6. S. Chang and D.I. Cheng and M. Marek-Sadowska. Minimizing ROBDD Size of incompletely Specified Multiple Output Functions. In Proc. European Design and Test Conference, pp. 620-624, 1994 https://doi.org/10.1109/EDTC.1994.326921
  7. M. Chiodo et al. Synthesis of Software Programs from CFSM Specifications, In Proc. Design Automation Conference, June 1995 https://doi.org/10.1145/217474.217594
  8. P. Chou and G. Borriello. Software Scheduling in the Co-synthesis of Reactive Real-time Systems. In Proc. Design Automation Conference, June 1994
  9. C.N. Coelho and G. De Michdli. Analysis and Synthesis of Concurrent Digital Circuits using Control-flow Expressions. IEEE Transaction on Computer-Aidedd Design, 15(8), pp. 854-876, August 1996 https://doi.org/10.1109/43.511567
  10. O. Coudert, C. Berthet, and J.C. Madre. Verification of Synchronous Sequential Machines Based on Symbolic Execution. In Automatic Verification Methods for Finite State Systems, pp. 365-373. Springer -Verlang, 1989
  11. S. Devadas, A. Ghosh, and K. Keutzer. Logic Synthesis. McGraw -Hill, 1994
  12. R. Dreshsler and N. Gockel. Minimization of BDDs by Evolutionaly Algorithms. In Proc. Int. Workshop on Logic Synthesis, 1997
  13. R. K. Gupta, C. N.Coelho Jr., and G. De Micheli. Program Implementation Schemes for Hardward-Software Systems. IEEE Computer, pp. 48-55, January 1994 https://doi.org/10.1109/2.248880
  14. Y. Hong, P.A, Berrel, J.R. Burch, K.L. Mcmillan. Safe BDD minimization using don't cares. In proc. Design Automation Conference, pp.208-213 https://doi.org/10.1145/266021.266068
  15. S. Ritz et al. Code Generation Techniques in the Block Diagram Oriented Design Tool COSSAP /DESCARTES. In Proc. International Conference on Signal Processing Applications and Technology, pp.709-714, 1994
  16. R. Rudell. Dynamic Variable Ordering for Ordered Binary Decision Diagrams. In Proc. Int. Conference on Computer-Aided Design, pp.42-47, Nov. 1993
  17. R. Saracco, J. R. W. Smith and R. Reed. Telecommunications Systems Engineering Using SDL. North Holland - Elsevier, 1989
  18. M. Sauerhoff and I. Wegener. On the Complexity of Minimizing the OBDD Size for Incompletely Specified Functions. IEEE Transactions on Computer-Aided Design, pp.1435-1437, Nov. 1996 https://doi.org/10.1109/43.543775
  19. E. M. Sentovich et al. Sequential Circuit Design Using Synthesis and Optimization. In Proc. Int. Conference on computer Design, pp.328-333, October 1992 https://doi.org/10.1109/ICCD.1992.276282
  20. E. M. Sentovich, H. Toma, and G. Berry. Efficient Lath Optimization Using Exclusive Sets. In Proc. Design Automation Conference, pp.8-11, June 1997
  21. T. Shiple, R. Hojati, A. Sangiovanni -Vincentelli, and R. K. Brayton. Heuristic Minimization of BDDs Using Don't Cares. In Proc. Design Automation Conference, pp.25-231, June 1994 https://doi.org/10.1145/196244.196360