References
- Digital system testing and testable design M.Abramovici;M.A.Breuer;A.D.Friedman
- Digital Hardware Testing:Transister-Level Fault Modeling and Testing R.Rajsuman
- 전자공학회지 v.22 no.12 메모리 테스트를 위한 BIST 기술 김대우;배성기;이창기;이상진;전병실
- PCI 버스 해설과 인터페이스 카드 설계 박선호
- IEEE Standard Test Access Port and Boundary Scan Architecture Test Technology Srandards Committee
- 테스팅 및 테스팅을 고려한 설계 홍성제;강성호;박은세;장훈;최호용
- Testing Semiconductor Memories: Theory and Practice A.J.Goor
- IEEE International Test Conference A Realistic Self-Teat Machine for Static Random Access Memories R.Dekker;F.Beenker;L.Thijseen
- Testing and Testable of High-Density Random-Access Memories Pinaki Mazumder;Kanad Chakraborty