Evaluation of fault coverage of digital circutis using initializability of flipflops

플립플롭의 초기화 가능성을 고려한 디지탈 회로에 대한 고장 검출율의 평가 기법

  • 민형복 (성균관대학교 전기공학과) ;
  • 김신택 (대림전문대학 전자계산과) ;
  • 이재훈 (성균관대학교 전기공학과)
  • Published : 1998.04.01

Abstract

Fault simulatior has been used to compute exact fault coverages of test vectors for digial circuits. But it is time consuming because execution time is proportional to square of circuit size. Recently, several algorithms for testability analysis have been published to cope with these problems. COP is very fast and accurate but cannot be used for sequential circuits, while STAFAN can be used for sequential circuits but needs vast amount of execution time due to good circuit simulation. We proposed EXTASEC which gave fast and accurate fault coverage. But it shows noticeable errors for a few sequential circuits. In this paper, it is shown that the inaccuracy is due to uninitializble flipflops, and we propose ITEM to improve the EXTASEC algorithm. ITEM is an improved evaluation method of fault coverage by analysis of backward lines and uninitializable flipflops. It is expected to perform efficiently for very large circuits where execution time is critical.

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