Journal of the Korean Institute of Telematics and Electronics C (전자공학회논문지C)
- Volume 35C Issue 3
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- Pages.69-78
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- 1998
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- 1226-5853(pISSN)
A study on the construction of multiple-valued logic functions and full-adders using by the edge-valued decision diagram
에지값 결정도에 의한 다치논리함수구성과 전가계기설계에 관한 연구
Abstract
This paper presented a method of extracting algorithm for Edge Multiple-Valued Decision Diagrams(EMVDD), a new data structure, from Binary Decision Diagram(BDD) which is resently using in constructing the digital logic systems based on the graph theory. We discussed the function minimization method of the n-variables multiple-valued functions and showed that the algorithm had the regularity with module by which the same blocks were made concerning about the schematic property of the proposed algorithm. We showed the EMVDD of Full Adder by module construction and verified the proposed algorithm by examples. The proposed method has the visible, schematical and regular properties.
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