초록
This paper describes an interface function and its performance assessment for high-bit-rate digital subscriber line (HDSL) under ATM. The interface of HDSL function of ATM system was achieved by HDSL subscriber physical layer board assembly(HSPA) which was modeled as design standard for ATM. We have presented a new worst case of subscriber line conditions from existing results of investigations on impairments such as crosstalk, impulse noise, longitudinal, power line noise and others. We have measured the maximum service loop length available by HDSL, and found that HSPA, at a 2.048Mbps data transmission, is possible within a carrier serving area(CSA) under the worst case loop noise conditions at an error rate or 10$^{-7}$ on a two coordinated unshielded twisted pairs in the presense of impairments. We conclude tht, in terms of a performance-per-lin simulator, the HSPA is an excellent candidate for HDSL implementation under ATM.
