The Journal of Korean Institute of Communications and Information Sciences (한국통신학회논문지)

The Korean Institute of Commucations and Information Sciences (한국통신학회)
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A bitwidth optimization algorithm for efficient hardware sharing

효율적인 하드웨어 공유를 위한 단어길이 최적화 알고리듬

  • 최정일 (서강대학교 전자공학과) ;
  • 전홍신 (삼성전자 System LSI 본부) ;
  • 이정주 (서강대학교 전자공학과) ;
  • 김문수 (서강대학교 전자공학과) ;
  • 황선영 (서강대학교 전자공학과)
  • Published : 1997.03.01
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Abstract

This paper presents a bitwidth optimization algorithm for efficient hardware sharing in digital signal processing system. The proposed algorithm determines the fixed-point representation for each signal through bitwidth optimization to generate the hardware requiring less area. To reduce the operator area, the algorithm partitions the abstract operations in the design description into several groups, such that the operations in the same group can share an operator. The partitioning result are fed to a high-level synthesis system to generate the pipelined fixed-point datapaths. The proposed algorithm has been implemented in SODAS-DSP an automatic synthesis system for fixed-point DSP hardware. Accepting the models of DSP algorithms in schematics, the system automatically generates the fixed-point datapath and controller satisfying the design constraints in area, speed, and SNR(Signal-to-Noise Ratio). Experimental results show that the efficiency of the proposed algorithm by generates the area-efficient DSP hardwares satisfying performance constraints.

Keywords

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