Design of a line balancing algorithm for the PCB assembly line including multiple surface mounters

다수 표면실장기계를 포함하는 PCB 조립라인의 라인균형화 알고리즘 설계

  • Kim, Jin-Cheol (Dept.of Electric Engineering, Seoul National University) ;
  • Lee, Sung-Han (Dept.of Electric Engineering, Seoul National University) ;
  • Kim, Dae-Won (Dept. of Electric & Electronic Engineering, Myong-ji Uinversity) ;
  • Lee, Bum-Hee (Dept.of Electric Engineering, Seoul National University)
  • 김진철 (서울대학교 전기공학부) ;
  • 이성한 (서울대학교 전기공학부) ;
  • 김대원 (명지대학교 전기전자공학부) ;
  • 이범희 (서울대학교 전기공학부)
  • Published : 1997.08.01

Abstract

This paper proposes a heuristic algorithm to efficiently perform line balancing in the PCB assembly line including multiple surface mounters efficiently. Generally, the problems in line balancing are classified into two kinds. Firstly, is the determining of the minimum number of machines required for achieving the desired production rate. Secondly, is the assign of jobs to multiple machines in order to minimize the cycle time which is defined as a maximum among the working times of machines when the number of machines is fixed. In this paper, we deal with the latter. We consider a PCB assembly line, including the multiple surface mounters arranged serially as a target system. Also, the conveyor is assumed to move at a constant speed and have no buffer. Considering that the minimum number of machines required for the desired production rate is a discrete nonincreasing function which is inversely proportional to the cycle time, we propose an optimization algorithm for line balancing by using the binary search method. The algorithm is validated through computer simulation, the results of which show that their shapes coincide nearly with those of optimal line balancing efficiency graphs regardless of the number of components, the performance of surface mounters, and the structure of assembly line.

Keywords

References

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