Journal of the Korean Institute of Telematics and Electronics C (전자공학회논문지C)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

A design of the processor dedicated to LPC-CEPSTRUM

LPC-CEPSTRUM 추출을 위한 전용 프로세서의 설계

  • 황인철 (고려대학교 전기,전자,전파공학부) ;
  • 김성남 (고려대학교 전기,전자,전파공학부) ;
  • 김영우 (고려대학교 전기,전자,전파공학부) ;
  • 김태근 (현대전자 System IC Lab.) ;
  • 김수원 (고려대학교 전기,전자,전파공학부)
  • Published : 1997.08.01
Download PDF
⟨ Previous Next ⟩

Abstract

An LPC cepstrum processor for speech recognition is implemented on CMOS array process. The designed processor contains a 24-bit floating-point MAC unit to perform the correlation quickly, which occupies the majority of operations used in the algorithm, and has 22 register files to store temporary variables. For the purpose of fast operations, the floating-point MAC consists of a 3-stage pipeline and the new post-normalization shceme is proposed and applied to it. Experimental result shows that it takes approximately 266.mu.s to process 200 samples/frame at 15 MHz clock rate. This processor runs at the maximum rate of 16.6 MHz and the number of gates are 27,760.

Keywords