A 16:1 Subsampling Block-Matching Algorithm and Its Hardware Design

16:1 부분 표본 추출 블럭 정합 알고리즘과 이의 하드웨어 설계

Conventional full search block matching algorithm for motion estimation is computationally intensive and the resulting hardware cost is very high. In this paper, we present an efficient block matching algorithm using a 16:1 subsampling technique, and describe its hardware design. The algorithm reduces the number of pixels in calculating the mean absolute difference at each search location, instead of reducing the search locations.The algorithm is an extension of the block mating algorithm with 4:1 subsampling proposed by Liu and Zaccarin such that the amount of computation is reduced by a fact of 4(16 compared to the full search block matching algorithm) while producing similar performance.The algorithm can efficiently be designed into a hardware for real-time applications.