Journal of the Korean Institute of Telematics and Electronics A (전자공학회논문지A)
- Volume 31A Issue 12
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- Pages.80-90
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- 1994
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- 1016-135X(pISSN)
A Study on the Structure Fabrication of LDD-nMOSFET using Rapid Thermal Annealing Method of PSG Film
PSG막의 급속열처리 방법을 이용한 LDD-nMOSFET의 구조 제작에 관한 연구
Abstract
To develop VLSI of higher packing density with 0.5.mu.m gate length of less, semiconductor devices require shallow junction with higher doping concentration. the most common method to form the shallow junction is ion implantation, but in order to remove the implantation induced defect and activate the implanted impurities electrically, ion-implanted Si should be annealed at high temperature. In this annealing, impurities are diffused out and redistributed, creating deep PN junction. These make it more difficult to form the shallow junction. Accordingly, to miimize impurity redistribution, the thermal-budget should be kept minimum, that is. RTA needs to be used. This paper reports results of the diffusion characteristics of PSG film by varying Phosphorus weitht %/ Times and temperatures of RTA. From the SIMS.ASR.4-point probe analysis, it was found that low sheet resistance below 100 .OMEGA./ㅁand shallow junction depths below 0.2.mu.m can be obtained and the surface concentrations are measured by SIMS analysis was shown to range from 2.5*10
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