Implementation and Performance Analysis of a Speaker Verification System

화자 확인 시스템의 설계 제작 및 성능 분석

This paper discusses issues on the disign and implementation of real-time automatic speaker verification system, as well as the performance analysis of the implemented system. The system employs TI's TMS320C25 digital signal processor TMS320C25 and high speed SRAMs. The system is designed to be used stand-alone as well as via hand-shaking with IBM-PC. The speech parameters used for speaker verification are PARCOR and LPC-cepstrum coefficients, and the employed decision logics are those based on the generalized weighted distance comcept. The implemented system showed the performance of 5.3% error rate for the PARCOR coefficient, and 4.7% error rate for the LPG-cepstrum coefficient.