A Study on the Design of an Adder using Carry Propagation Characteristics

자리올림의 전파특성을 이용한 가산회로의 설계에 관한 연구

This paper suggests a new addition algorithm. A circuit to implement the algorithm and the result of its performance evaluation are presented. The basic idea of the algorithm is that to obtain the sum of two operands, two operands bits are exclusive-ORed and then the result is inverted by the carry from the previous stage. An unique carry prediction method minimizes carry propagation. The proposed circuit has a very simple and regular structure compared with CLA (carry lookahead adder). It also requires less gates for the implementation about 50% and operates faster.