The Effect of Intrinsic Capacitances of MOSFET's on the Charge Redistribution in Dynamic Gates

MOSFET의 Intrinsie캐패시턴스가 도미노 논리회로에서의 전하 재분포에 미치는 영향

In this paper we propose a model which can predict well the logical errors come from the charge redistribution in domino gates. In this model the effect of the intrinsic capacitance between gate and channel of MOSFET's is considered. This effect is more important than the parasitic capacitance effect. The error by the proposed model is only 8% of that by the currently used model. This model can be used as a guide-line in the design of domino circuits.