Journal of the Korean Institute of Telematics and Electronics (대한전자공학회논문지)
- Volume 27 Issue 8
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- Pages.1221-1230
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- 1990
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- 1016-135X(pISSN)
The Design of A Code Generator for RISC Architecture
RISC 아키텍춰의 코드 생성기 설계
Abstract
This paper presents a code generation method and an effective handling algorithm of ingeger constant multiplication for RISC machines in compiler design. As RISC Architectures usually use faster and more simply formed instructions than CISC's and most RISC processors do not have an integer multiplication instruction, it is required an effective algorithm to process integer multiplication. For the proposed code generator, Portable C Compiler(PCC) is redesigned to be suitable for an RISC machine, and composed an addition chain is built up to allow fast execution of constant multiplication, a part of integer one whicch appears very frequency in code generation phase.
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