GaAs E/D MESFET의 염계전압 변동에 강한 레벨 변환회로의 설계

A Design of Level Converter with the Increased Acceptable Threshold Voltage Variations of GaAs E/D MESFETs

  • 이창석 (한국전자통신연구소 화합물반도체연구부) ;
  • 윤광준 (한국전자통신연구소 화합물반도체연구부) ;
  • 박형무 (한국전자통신연구소 화합물반도체연구부) ;
  • 마동성 (한국전자통신연구소 화합물반도체연구부)
  • 발행 : 1989.11.01

초록

In this paper, a new design of GaAs level converter is proposed, and anlyzed wth the variation of the threshold voltage of E/D MESFETs. The threshold voltage ranges analyzed are -0.05V to 0.35V for enhancement type MESFETs and -0.3V to -0.7V for depletion type MESFETs. In this range, the variation of the input characteristics of the conventional level converter designed to convert the level of DCFL using Vss of -0.8V to that of -0.2V, is greather than 600mV, but of the level converter proposed here is less than 100mV.

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