HALO : An Efficient Global Placement Strategy for Standard Cells

HALO : 효율적 표준셀 배치 알고리듬

This paper describes an efficient global cell (module) placement strategy called HALO (Hierarchical Alternating Linear Ordering)which generates global 2-D placement of circuit modules by hierarchical application of linear ordering in alternating direction. We tried, in principle, to explain why HALO should perform better than other typical, somehat successful, analytical approaches such as min-cut, force-directed relaxation(FDR)or its likes. We have implemented HALO as a program for standard cell placement. Experimental results on two benchmark circuits, primary and primary 2 consisting of 752 and 2907 cells, respectively have shown a decrease of half-perimeter routing length by 7% and 24%, respectively compared to the best available results obtained so far. Total CPU time including the following detailed placement was less than half of the earlier work.