The Transactions of the Korean Institute of Electrical Engineers (대한전기학회논문지)
- Volume 34 Issue 8
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- Pages.301-307
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- 1985
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- 0254-4172(pISSN)
A Preliminary Architecture for a Data Flow Machine Model with Node Labelling
Node Label에 의한 기본적 Data Flow Machine 모델
Abstract
The first four generations of computers are all based on a single basic design: the Von Neuman Processor, which is sequential and does one operation at a time. Efforts to develop concurrent or parallel computers have been carried on for many years. Data flow approach is significant in these efforts to make high speed parallel machines and expected a great deal of parallelism. In this paper we propose a preliminary data Flow Machine Model operating asynchronously on the base of Node Labelling. We introduce a concept of Node Labeling for this purpose which is relevant to the Data dependency and Parallelism. And we explain how the Node Tokens are fired in the proposed system.
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