Robust PLL Algorithms for Grid Voltage with DC Offset voltages

옵셋오차전압이 포함된 계통 전압에 강인한 PLL 알고리즘

This paper proposes the PLL algorithms with both the quadrature signal generator (QSG) and the positive-sequence calculator (PSC) in order to remove the effects of the three-phase grid voltage with dc offset voltages. The performances of the proposed method are verified with both the simulation result and the experimental result with 32-bit DSP.