A Study on Blister Formation and Electrical Characteristics with Varied Annealing Condition of P-doped Amorphous Silicon

  • 최성진 (고려대학교 에너지환경정책기술학과) ;
  • 김가현 (한국에너지기술연구원 차세대전지원천기술센터) ;
  • 강민구 (한국에너지기술연구원 태양광연구실) ;
  • 이정인 (한국에너지기술연구원 태양광연구실) ;
  • 김동환 (고려대학교 신소재공학과) ;
  • 송희은 (한국에너지기술연구원 태양광연구실)
  • Published : 2016.02.17

Abstract

The rear side contact recombination in the crystalline silicon solar cell could be reduced by back surface field. We formed polycrystalline silicon as a back surface field through crystallization of amorphous silicon. A thin silicon oxide applied to the passivation layer. We used quasi-steady-state photoconductance measurement to analyze electrical properties with various annealing condition. And, blister formed on surface of wafer during the annealing process. We observed the blister after varied annealing process with wafer of various surface. Shape and density of blister is influenced by various annealing temperature and process time. As the annealing temperature became higher, the average diameter of blister is decreased and total number of blister is increased. The sample with the $600^{\circ}C$ annealing temperature and 1 min annealing time exhibited the highest implied open circuit voltage and lifetime. We predicted that the various shape and density of blister affects the lifetime and implied open circuit voltage.

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