Numerical Analysis for Thermal Isolation on Plasma Etched silicon micro-structures

DRIE 식각을 이용한 대면적 실리콘 미세 구조물 부유 시 발생하는 열고립 현상 해석

  • Lee, Yong-Seok (Department of Electrical Engineering and Computer Science Seoul National University) ;
  • Jang, Yun-Ho (Department of Electrical Engineering and Computer Science Seoul National University) ;
  • Kim, Jung-Mu (Department of Electronic Engineering Chonbuk National University) ;
  • Kim, Yong-Kweon (Department of Electrical Engineering and Computer Science Seoul National University)
  • 이용석 (서울대학교 전기컴퓨터 공학부) ;
  • 장윤호 (서울대학교 전기컴퓨터 공학부) ;
  • 김정무 (전북대학교 전자공학부) ;
  • 김용권 (서울대학교 전기컴퓨터 공학부)
  • Published : 2011.07.20

Abstract

This paper presents a theoretical and numerical analysis for thermal isolation of silicon micro-structures, especially for a large size with poor thermal conductivity, as well as straightforward solution for such an issue. Additional metal patterns underneath the silicon structures effectively reduces the thermal isolation. Heat transfer mechanism is analyzed using an equivalent circuit of thermal network including plasma, a heat source, heat capacitors, and thermal resistances. The FEM simulation was carried out to investigate the temperature change of silicon micro-structures according to process time. The temperature of silicon micro-structures with 2 ${\mu}m$ thick chrome layer at a steady state is $86^{\circ}C$, an approximately 40% decrease from the silicon microstructure without thin metal ($122^{\circ}C$)

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