철도시스템의 안전성 향상을 위한 주연산보드 구현

Implementation of Main Computation Board for Safety Improvement of railway system

  • 박주열 (한양대학교 일반대학원 전자컴퓨터통신공학과, 샬롬엔지니어링(주)) ;
  • 김효상 (샬롬엔지니어링(주)) ;
  • 이준환 (샬롬엔지니어링(주)) ;
  • 김봉택 (샬롬엔지니어링(주)) ;
  • 정기석 (한양대학교 공과대학)
  • 발행 : 2011.05.26

초록

Since the release of safety standard IEC 61508 which defines functional safety of electronic safety-related systems, SIL(Safety Integrity Level) certification for railway systems has gained lots of attention lately. In this paper, we propose a new design technique of the computer board for train control systems with high reliability and safety. The board is designed with TMR(Triple Modular Redundancy) using a certified SIL3 Texas Instrument(TI)'s TMS570 MCU(Micro-Controller Unit) to guarantee safety and reliability. TMR for the control device is implemented on FPGA(Field Programmable Gate Array) which integrates a comparator, a CAN(Controller Area Network) communication module, built-in self-error checking, error discriminant function to improve the reliability of the board. Even if a malfunction of a processing module occurs, the safety control function based on the proposed technique lets the system operate properly by detecting and masking the malfunction. An RTOS (Real Time Operation System) called FreeRTOS is ported on the board so that reliable and stable operation and convenient software development can be provided.

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