Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)
- 2009.06a
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- Pages.95-96
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- 2009
A Capacitorless 1-Transistor DRAM Device using Strained-Silicon-on-Insulator (sSOI) Substrate
Strained-Silicon-on-Insulator (sSOI) 기판을 이용한 Capacitorless 1-Transistor DRAM 소자
- Kim, Min-Soo (Kwangwoon Univ) ;
- Oh, Jun-Seok (Kwangwoon Univ) ;
- Jung, Jong-Wan (Sejong Univ) ;
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Lee, Young-Hie
(Kwangwoon Univ) ;
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Chung, Hong-Bay
(Kwangwoon Univ) ;
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Cho, Won-Ju
(Kwangwoon Univ)
- Published : 2009.06.18
Abstract
A fully depleted capacitorless 1-transistor dynamic random access memory (FD 1T-DRAM) based on a sSOI strained-silicon-on-insulator) wafer was investigated. The fabricated device showed excellent electrical characteristics of transistor such as low leakage current, low subthreshold swing, large on/off current ratio, and high electron mobility. The FD sSOI 1T-DRAM can be operated as memory device by the floating body effect when the substrate bias of -15 V is applied, and the FD sSOI 1T-DRAM showed large sensing margin and several milli seconds data retention time.