Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Study of the power consumption of ECC circuits designed by various evolution strategies

다양한 진화 알고리즘으로 설계된 ECC회로들의 전력소비 연구

  • Lee, Hee-Sung (School of Electrical and Electronic Engineering Yonsei University) ;
  • Kim, Eun-Tai (School of Electrical and Electronic Engineering Yonsei University)
  • 이희성 (연세대학교 전기전자공학부) ;
  • 김은태 (연세대학교 전기전자공학부)
  • Published : 2008.06.18
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Abstract

Error correcting codes (ECC) are widely used in all types of memory in industry, including caches and embedded memory. The focus in this paper is on studying of power consumption in memory ECCs circuitry that provides single error correcting and double error detecting (SEC-DED) designed by various evolution strategies. The methods are applied to two commonly used SEC-DED codes: Hamming and odd column weight Hsiao codes. Finally, we conduct some simulations to show the performance of the various methods.

Keywords