한국철도학회:학술대회논문집 (Proceedings of the KSR Conference)
- 한국철도학회 2008년도 춘계학술대회 논문집
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- Pages.572-578
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- 2008
철도신호를 위한 단일칩 개발에 관한 연구
The Research of System-On-Chip Design for Railway Signal System
초록
As the railway transportation is getting faster and its operation speed has increased rapidly, its signal control has been complicated. For real time signal processing it is very important to prohibit any critical error from causing the system to malfunction. Therefore, handling complicated signals effectively while maintaining fault-tolerance capability is highly expected in modern railway transportation industry. In this paper, we suggest an SoC (Sytem-on-Chip) design method to integrate these complicated signal controlling mechanism with fault tolerant capability in a single chip. We propose an SoC solution which contains a high performance 32-bit embedded processor, digital filters and a PWM unit inside a single chip to implement ATO's, ATC's, ATP's and ATS's digital signal-processing units. We achieve an enhanced reliability against the calculation error by adding fault tolerance features to ensure the stability of each module.
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