대한전기학회:학술대회논문집 (Proceedings of the KIEE Conference)
- 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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- Pages.197-198
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- 2007
10Gbps CMOS 클록/데이터 복원회로 설계
Design of a 10Gbps CMOS Clock and Data Recovery Circuit
- Cha, C.H. (Dept. of Electronic Engineering University of Incheon) ;
- Shim, H.C. (Dept. of Electronic Engineering University of Incheon) ;
- Jeon, S.H. (Dept. of Electronic Engineering University of Incheon) ;
- Yu, C.G. (Dept. of Electronic Engineering University of Incheon)
- 발행 : 2007.10.26
초록
In this paper, a 10Gbps Clock and Data Recovery circuit is designed in
키워드