대한전기학회:학술대회논문집 (Proceedings of the KIEE Conference)
- 대한전기학회 2007년도 제38회 하계학술대회
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- Pages.1850-1851
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- 2007
다중 시스템 클럭 도메인을 고려한 경계 주사 테스트 기법에 관한 연구
Boundary Scan Test Methodology for Multiple Clock Domains
- Jung, Sung-Won (Depart. of Information & Communication Engineering, Sungkyunkwan University) ;
- Kim, In-Soo (Depart. of Information & Communication Engineering, Sungkyunkwan University) ;
- Min, Hyoung-Bok (Depart. of Information & Communication Engineering, Sungkyunkwan University)
- 발행 : 2007.07.18
초록
To the Boundary Scan, this architecture in Scan testing of design under the control of boundary scan is used in boundary scan design to support the internal scan chain. The internal scan chain has single scan-in port and single scan-out port that multiple scan chain cannot be used. Internal scan design has multiple scan chains, those chains must be stitched to form a scan chain as this paper. We propose an efficient Boundary Scan test structure for multiple clock testing in design.
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