Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A design on a tri-state clock driver using charge recycling

Charge recycling 기술을 이용한 tri-state clock driver

  • Kim, Si-Nai (Division of Electrical and Computer Engineering Hanyang University) ;
  • Im, Jong-Man (Division of Electrical and Computer Engineering Hanyang University) ;
  • Yoon, Han-Sub (Division of Electrical and Computer Engineering Hanyang University) ;
  • Kwack, Kae-Dal (Division of Electrical and Computer Engineering Hanyang University)
  • 김시내 (한양대학교 전자통신컴퓨터공학부) ;
  • 임종만 (한양대학교 전자통신컴퓨터공학부) ;
  • 윤한섭 (한양대학교 전자통신컴퓨터공학부) ;
  • 곽계달 (한양대학교 전자통신컴퓨터공학부)
  • Published : 2006.06.21
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Abstract

This paper introduces a CMOS clock driver that shows a high efficiency of electric power (lower power consumption) with the supply of lower voltage(VDD), by taking advantage of charge recycling technology. Comparing with the existing structure, this driver showed the improved maximum efficiency of electric power; 72% and 68%, with the supplied voltage of 1.8v and 1.2v, respectively. Since the output waveform shows the tri-state operating region, utilization is expected in the digital integrated circuits.

Keywords