Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Statistical Simulation for Superscalar DSP Processors

수퍼스칼라 디지털 신호처리 프로세서에 대한 통계적 모의실험

  • Lee, Jong-Bok (Dept. of Information and Communications, Hansung University)
  • 이종복 (한성대학교 정보통신공학과)
  • Published : 2005.11.26
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Abstract

In this paper, statistical simulation is applied to a superscalar digital signal processor architecture using DSP kernel and DSP application benchmarks. As a result, the performance of a digital signal processor with several microarchitecture configurations can be estimated with the relative error of 3.7 ${\backslash}%$ on the average.

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