Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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CMOS Single Supply Op Amp IC Layout Design

CMOS 단일 전원 OP AMP IC 레이아웃 설계

  • Jarng, Sun-Suk (Information Control Instrumentation Engineering Department, Chosun University) ;
  • Kim, Yu-Ri-Ae (Information Control Instrumentation Engineering Department, Chosun University)
  • 장순석 (조선대학교 전자정보공과대학 정보제어계측공학과) ;
  • 김유리애 (조선대학교 전자정보공과대학 정보제어계측공학과)
  • Published : 2005.11.26
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Abstract

According to miniaturization trend of rehabilitation medical equipment such as hearing aid, study to replace previous complex system with semiconductor SOC (System-on-Chip) chip becomes lively. In this study, after investigating of existent hearing aid performance in circuit design approach, low electric power consuming, single power supply (1.4V battery) CMOSS OP AMP was designed. Analog circuit design tools such as Hspice and Cadence were used for circuit simulation and implementing layout design. This study shows technical methods particularly for layout design. The work is done in pmos and nmos active element layout design in addition to passive element design such as resister, capacitor and inductor.

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