Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of a CMOS Charge Pump PLL of UWB System LO Generation

초광대역 시스템 Hopping Carrier 발생을 위한 0.18um 4.224GHz CMOS PLL 설계

  • Lee, J.K. (Department of Electronics Engineering, University of Incheon) ;
  • Kang, K.S. (Department of Electronics Engineering, University of Incheon) ;
  • Park, J.T. (Department of Electronics Engineering, University of Incheon) ;
  • Yu, C.G. (Department of Electronics Engineering, University of Incheon)
  • Published : 2005.11.26
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Abstract

This paper describes a 4.224GHz CMOS charge pump PLL for Mode 1 MB-OFDM UWB hopping carrier generation. It includes a qudrature VCO of which the frequency range is from 3.98GHz to 4.47GHz(@ 0.4 to 1.5 V), a divider, a PFD, a loop filter, a charge pump, and a lock detector. Designed in a 0.18um CMOS technology, the PLL draws 6.6mA from a 1.8V supply. The phase noise of the designed VCO is -133dBc/Hz@3MHz.

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