Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2005.11a
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- Pages.801-804
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- 2005
Design of an 8-bit Color Adjustor for SDTV Using Verilog HDL
Verilog HDL을 이용한 SDTV용 8bit 색상 보정기의 설계
- Jeon, Byoung-Woong (School of Electronic Engineering, Soongsil University) ;
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Song, In-Chae
(School of Electronic Engineering, Soongsil University)
- Published : 2005.11.26
Abstract
In this paper, we designed an 8-bit color adjustor for SDTV using Verilog HDL. The conversion block requires a lot of multiplication. So we adopted Booth algorithm to reduce amount of operation and processing time. To improve speed, we designed the system output as parallel structure. We synthesized the designed system using Xilinx ISE and verified the operation through simulation using Modelsim.
Keywords