Parameterized FFT/IFFT Core Generator for ODFM Modulation/Demodulation

OFDM 변복조를 위한 파라메터화된 FFT/IFFT 코어 생성기

  • Lee, J.W. (School of Electronic Eng., Kumoh National Institute of Technology) ;
  • Kim, J.H. (School of Electronic Eng., Kumoh National Institute of Technology) ;
  • Shin, K.W. (School of Electronic Eng., Kumoh National Institute of Technology) ;
  • Baek, Y.S. (Modem SoC Design Team, ETRI) ;
  • Eo, I.S. (Modem SoC Design Team, ETRI)
  • 이진우 (금오공과대학교 전자공학부) ;
  • 김종환 (금오공과대학교 전자공학부) ;
  • 신경욱 (금오공과대학교 전자공학부) ;
  • 백영석 (한국전자통신 연구원 모뎀 SoC 설계팀) ;
  • 어익수 (한국전자통신 연구원 모뎀 SoC 설계팀)
  • Published : 2005.11.26

Abstract

A parameterized FFT/IFFT core generator (PFFT_CoreGen) is designed, which can be used as an essential IP (Intellectual Property) in various OFDM modem designs. The PFFT_CoreGen generates Verilog-HDL models of FFT cores in the range of 64 ${\sim}$ 2048-point. To optimize the performance of the generated FFT cores, the PFFT_CoreGen can select the word-length of input data, internal data and twiddle factors in the range of 8-b ${\sim}$ 24-b. Some design techniques for low-power design are considered from algorithm level to circuit level.

Keywords