Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A low voltage SRAM using double boosting scheme

이중 부스팅 회로를 이용한 저전압 SRAM

  • Jung, Sang-Hoon (Department of Electronic Engineering, Kyungpook National University) ;
  • Eom, Yoon-Joo (Department of Electronic Engineering, Kyungpook National University) ;
  • Chung, Yeon-Bae (Department of Electronic Engineering, Kyungpook National University)
  • 정상훈 (경북대학교 공과대학 전자공학과) ;
  • 엄윤주 (경북대학교 공과대학 전자공학과) ;
  • 정연배 (경북대학교 공과대학 전자공학과)
  • Published : 2005.11.26
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Abstract

In this paper, a low voltage SRAM using double boosting scheme is described. A low supply voltage deteriorates the static noise margin (SNM) and the cell read-out current. For read/write operation, a selected word line and cell VDD bias are boosted in a different level using double boosting scheme. This increases not only the static noise margin but also the cell readout current at a low supply voltage. A low voltage SRAM with 32K ${\times}$ 8bit implemented in a 0.18um CMOS technology shows an access time of 26.1ns at 0.8V supply voltage.

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