Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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An Efficient Hardware Implementation of AES-based CCM Protocol for IEEE 802.11i Wireless LAN Security

IEEE 802.11i 보안용 AES 기반 CCM 프로토콜의 효율적인 하드웨어로 구현

  • Hwang, Seok-Ki (School of Electronic eng., Kumoh National Institute of Technology) ;
  • Lee, Jin-Woo (School of Electronic eng., Kumoh National Institute of Technology) ;
  • Kim, Chay-Hyeun (School of Electronic eng., Kumoh National Institute of Technology) ;
  • Song, You-Su (School of Electronic eng., Kumoh National Institute of Technology) ;
  • Shin, Kyung-Wook (School of Electronic eng., Kumoh National Institute of Technology)
  • 황석기 (금오공과 대학교 전자공학부) ;
  • 이진우 (금오공과 대학교 전자공학부) ;
  • 김채현 (금오공과 대학교 전자공학부) ;
  • 송유수 (금오공과 대학교 전자공학부) ;
  • 신경욱 (금오공과 대학교 전자공학부)
  • Published : 2005.11.26
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Abstract

This paper describes a design of AES-based CCM Protocol for IEEE 802.11i Wireless LAN Security. The CCMP core is designed with 128-bit data path and iterative structyre which uses 1 clock cycle per round operation. To maximize its performance, two AES cores are used, one is for counter mode for data confidentiality and the other is for CBC(Cipher Block Chaining) mode for authentication and data integrity. The S-box that requires the largest hardware in AES core is implemented using composite field arithmetic, and the gate count is reduced by about 23% compared with conventional LUT-based design. The CCMP core designed in Verilog-HDL has 35,013 gates, and the estimated throughput is about 768Mbps at 66-MHz clock frequency.

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