Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)

The Korean Institute of Electrical Engineers (대한전기학회)
권호 표지

The Design of a high resolution 2-order Sigma-Delta modulator

고해상도 2차 Sigma-Delta 변조기의 설계

  • 김규현 (한국전자통신연구원 다기능소자팀) ;
  • 양일석 (한국전자통신연구원 다기능소자팀) ;
  • 이대우 (한국전자통신연구원 다기능소자팀) ;
  • 유병곤 (한국전자통신연구원 다기능소자팀) ;
  • 김종대 (한국전자통신연구원 다기능소자팀)
  • Published : 2003.11.21
Download PDF
⟨ Previous Next ⟩

Abstract

In this paper, a high-resolution multibit sigma-delta modulator implemented in a.0.35-um CMOS technology is introduced. This modulator consists of two switched capacitor integrators, 3-bits A/D converter, and 3-bits D/A converter For the verification of the internal function blocks, HSPICE simulator is used. This circuit is normally operated at 130 MHz clock and the total power dissapation is 70 mW.

Keywords