A study on a FPGA based implementation of the 2 dimensional discrete wavelet transform using a fast lifting scheme algorithm for the JPEG2000 image compression

JPEG2000 영상압축을 위한 리프팅 설계 알고리즘을 이용한 2차원 이산 웨이블릿 변환 프로세서의 FPGA 구현에 대한 연구

The Wavelet Transform has been applied in mathematics and computer sciences. Numerous studies have proven its advantages in image processing and data compression, and have made it a basic encoding technique in data compression standards like JPEG2000 and MPEG-4. Software implementations of the Discrete Wavelet Transform (DWT) appears to be the performance bottleneck in real-time systems in terms of performance. And hardware implementations are not flexible. Therefore, FPGA implementations of the DWT has been a topic of recent research. The goal of this thesis is to investigate of FPGA implementations of the DWT Processor for image compression applications. The DWT processor design is based on the Lifting Based Wavelet Transform Scheme, which is a fast implementation of the DWT The design uses various techniques. The DWT Processor was simulated and implemented in a FLEX FPGA platform of Altera