Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2003.07e
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- Pages.2196-2199
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- 2003
Comparison of Computation Complexity for Digital Pulse Compressor
디지털 펄스압축기의 연산 양 비교
Abstract
With the development of digital signal processor(DSP), digital pulse compressor (DPC) is commonly used in radar systems. A DPC is implemented by using finite impulse response(FIR) filter algorithm in time domain or fast Fourier transform(FFT) algorithm in frequency domain. This paper compares the computation complexity tot these two methods and calculates boundary Fm filter taps that determine which of the two methods is better based on computation amount. Also, it shows that the boundary FIR filter taps for DSP, ADSP21060, and those for computation complexity have similar characteristic.
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